Minimum qualifications:

• Currently pursuing a Bachelor’s or a Master’s degree in Electronics Engineering, Electrical Engineering, or a related technical field.
  
• Experience with design concepts and computer hardware architecture.
  
• Experience with hardware or electrical engineering through internship, work, or personal projects.
  
• Ability to communicate in English fluently to participate in technical discussions.
  

Preferred qualifications:

• Experience in one or more of the following areas: SoC/ASIC Design, Design Verification, Physical Design, Design for Testability.
  
• Experience with Verilog/HDL or System Verilog coding.
  
• Experience with one of the scripting languages (e.g., Perl, TCL, or Python).
  
• Experience with EDA tools and methodology (e.g., Lint, CDC, Synthesis, Formal Equivalence) or low power reduction techniques.
  
• Ability to work full time for 6 months outside of university term time.
  
  
  

Responsibilities

• Work with the team to develop power and performance optimized chips.
• Contribute to the design, verification, and silicon implementation of chips.
• Collaborate with local and remote teams in automating design flows.